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2-threshold inverter (hardware, numerical response) - 20 Nov 2019

Just to remind ourselves, the simple circuit we are working with is this:



The inverting schmitt trigger used is a 74AC14. We are measuring the input, the output, and the voltage across the capacitor.

Here is a composite plot of the response of this device to 4-bit inputs, with 6.5 ms bit widths, which count from 0 to 15:


(Click for larger image)

In this instance there are actually only 6 different input signals. Some signals, such as 1, 2, 4, and 8, are just shifted versions of each other. The only group of signals that are passed by the device at this bit width are for the numbers 3, 6, 9, and 12:

Group Bits        Numbers
----- ----------- ----------------------
  0:  0 0 0 0      0
  1:  0 0 0 1      1   2   4   8
  2:  0 0 1 1      3   6   9  12
  3:  0 1 0 1      5  10
  4:  0 1 1 1      7  11  13  14
  5:  1 1 1 1     15

Input  Output
-----  ------
0      OFF
1      OFF
2      OFF
3      ON
4      OFF
5      OFF
6      ON
7      OFF
8      OFF
9      ON
10     OFF
11     OFF
12     ON
13     OFF
14     OFF
15     OFF

As the bit width is increased to 13 ms, signals for the numbers 5 and 10 are now passed:


(Click for larger image)

When the bit width is increased to 21 ms, signals 1, 2, 4, and 8 are now passed:


(Click for larger image)

Finally, when the bit width is increased to 22.25 ms, signals 7, 11, 13, and 14 are passed:


(Click for larger image)

Here is a table of the numerical signals passed for different bit widths:

                 Bit width
       --------------------------------
Input  6.5 ms  13 ms   21 ms   22.25 ms
-----  ------  ------  ------  --------
0      
1                      ON      ON
2                      ON      ON
3      ON      ON      ON      ON
4                      ON      ON
5              ON      ON      ON
6      ON      ON      ON      ON
7                              ON
8                      ON      ON
9      ON      ON      ON      ON
10             ON      ON      ON
11                             ON
12     ON      ON      ON      ON
13                             ON
14                             ON
15     

The signals for 0 (always off) and 15 (always on) don't amount to much, since there is no switching of the input. The bit widths required for signals {1, 2, 4, 8} and {7, 11, 13, 14} are slightly different because of the asymmetry of the thresholds. It takes slightly longer to drop the capacitor value to the lower threshold level.

Here is a plot of the equivalence groups for each 4-bit number:

Here are plots of the output vs. input groups for the four bit widths shown above:

When all fours signal types are passed, the device acts as a permutation operator, mapping two signal groups to themselves (identity), and two to their inverses. This operator has two eigensignals: groups 2 and 3. This behavior is similar to that of a hermitian unitary operator, such as X (swap):

Input group   Output group
-----------   ------------
     1     -->     4
     2     -->     2
     3     -->     3
     4     -->     1

Here is the response of the device to 6-bit inputs with 4.4 ms bit widths:


(Click for larger image)

At this bit width, only the signals for numbers 7, 14, 28, 35, 49, and 56 are passed. As the number of bits are increased, the minimum bit width for turn-on of the lowest frequency signal decreases. The fastest square wave passed by the device has 13 ms pulses. For 6 bits, this corresponds to 3 bits on, 3 off. 3 bits = 13 ms, therefore 1 bit = about 4.333... ms.

There are 14 different signals consisting of 6 bits, of which 12 are switching:

Group Bits            Numbers
----- -----------     ----------------------
  0:  0 0 0 0 0 0      0
  1:  0 0 0 0 0 1      1   2   4   8  16  32
  2:  0 0 0 0 1 1      3   6  12  24  33  48
  3:  0 0 0 1 0 1      5  10  17  20  34  40
  4:  0 0 0 1 1 1      7  14  28  35  49  56
  5:  0 0 1 0 0 1      9  18  36
  6:  0 0 1 0 1 1     11  22  25  37  44  50
  7:  0 0 1 1 0 1     13  19  26  38  41  52
  8:  0 0 1 1 1 1     15  30  39  51  57  60
  9:  0 1 0 1 0 1     21  42
 10:  0 1 0 1 1 1     23  29  43  46  53  58
 11:  0 1 1 0 1 1     27  45  54
 12:  0 1 1 1 1 1     31  47  55  59  61  62
 13:  1 1 1 1 1 1     63


Here is a table of the minimum bit widths required for passing each signal group:

                      Bit width (ms)
                      ------------------------------------------------------------------------------------------
Group Bits            4.4  6.3  7.1  9.6  10.3  13.0  14.8  16.0  17.4  19.1  19.2  20.6  20.9  21.7  22.3  22.9
----- -----------     ---  ---  ---  ---  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----
  1:  0 0 0 0 0 1                                                                               ON    ON    ON
  2:  0 0 0 0 1 1                    ON   ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON
  3:  0 0 0 1 0 1                                     ON1   ON1   ON1   ON1   ON1   ON1   ON2   ON2   ON2   ON2
  4:  0 0 0 1 1 1     ON   ON   ON   ON   ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON
  5:  0 0 1 0 0 1                                                             ON    ON    ON    ON    ON    ON
  6:  0 0 1 0 1 1               ON1  ON1  ON1   ON1   ON1   ON1   ON2   ON2   ON2   ON2   ON2   ON2   ON2   ON2
  7:  0 0 1 1 0 1          ON1  ON1  ON1  ON1   ON1   ON1   ON1   ON1   ON2   ON2   ON2   ON2   ON2   ON2   ON2
  8:  0 0 1 1 1 1                         ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON
  9:  0 1 0 1 0 1                               ON    ON    ON    ON    ON    ON    ON    ON    ON    ON    ON
 10:  0 1 0 1 1 1                                           ON1   ON1   ON1   ON1   ON1   ON1   ON1   ON2   ON2
 11:  0 1 1 0 1 1                                                                   ON    ON    ON    ON    ON
 12:  0 1 1 1 1 1                                                                                           ON

Groups marked with ON1 and ON2 produce two different outputs. Output #1 is produced for bit widths marked with ON1 and output #2 is produced for bits widths marked with ON2. The actual input and output signals for each of the 64 combinations can be saved on the computer and then classified based on the 14 number groups shown above. If a cross-section of all inputs and outputs is taken at a bit width of 16.5 ms, 4 of the ON signals and 4 of the ON1 signals will be visible:


(Click for larger image)

If another cross-section is taken at 23.5 ms, the rest of the ON signals, and the 4 ON2 signals, will be visible:


(Click for larger image)

The table of input and output groups vs. bit widths now becomes:

         Output group at bit width (ms)
Input    ------------------------------------------------------------------------------------------
group    4.4  6.3  7.1  9.6  10.3  13.0  14.8  16.0  17.4  19.1  19.2  20.6  20.9  21.7  22.3  22.9
-----    ---  ---  ---  ---  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----
1                                                                                  12    12    12 
2                       8    8     8     8     8     8     8     8     8     8     8     8     8 
3                                        12    12    12    12    12    12    10    10    10    10  
4        4    4    4    4    4     4     4     4     4     4     4     4     4     4     4     4 
5                                                                11    11    11    11    11    11 
6                  8    8    8     8     8     8     7     7     7     7     7     7     7     7  
7             2    2    2    2     2     2     2     2     6     6     6     6     6     6     6  
8                            2     2     2     2     2     2     2     2     2     2     2     2 
9                                  9     9     9     9     9     9     9     9     9     9     9 
10                                             1     1     1     1     1     1     1     3     3  
11                                                                     5     5     5     5     5 
12                                                                                             1 

Plots of outputs vs. inputs for the 3 bit widths shown above are:

For 8 bits, there are 36 different signals, of which 34 are interesting (switching):

Group Bits               Numbers
----- ---------------    -----------------------
  0:  0 0 0 0 0 0 0 0      0
  1:  0 0 0 0 0 0 0 1      1   2   4   8  16  32  64 128
  2:  0 0 0 0 0 0 1 1      3   6  12  24  48  96 129 192
  3:  0 0 0 0 0 1 0 1      5  10  20  40  65  80 130 160
  4:  0 0 0 0 0 1 1 1      7  14  28  56 112 131 193 224
  5:  0 0 0 0 1 0 0 1      9  18  33  36  66  72 132 144
  6:  0 0 0 0 1 0 1 1     11  22  44  88  97 133 176 194
  7:  0 0 0 0 1 1 0 1     13  26  52  67 104 134 161 208
  8:  0 0 0 0 1 1 1 1     15  30  60 120 135 195 225 240
  9:  0 0 0 1 0 0 0 1     17  34  68 136
 10:  0 0 0 1 0 0 1 1     19  38  49  76  98 137 152 196
 11:  0 0 0 1 0 1 0 1     21  42  69  81  84 138 162 168
 12:  0 0 0 1 0 1 1 1     23  46  92 113 139 184 197 226
 13:  0 0 0 1 1 0 0 1     25  35  50  70 100 140 145 200
 14:  0 0 0 1 1 0 1 1     27  54  99 108 141 177 198 216
 15:  0 0 0 1 1 1 0 1     29  58  71 116 142 163 209 232
 16:  0 0 0 1 1 1 1 1     31  62 124 143 199 227 241 248
 17:  0 0 1 0 0 1 0 1     37  41  73  74  82 146 148 164
 18:  0 0 1 0 0 1 1 1     39  57  78 114 147 156 201 228
 19:  0 0 1 0 1 0 1 1     43  86  89 101 149 172 178 202
 20:  0 0 1 0 1 1 0 1     45  75  90 105 150 165 180 210
 21:  0 0 1 0 1 1 1 1     47  94 121 151 188 203 229 242
 22:  0 0 1 1 0 0 1 1     51 102 153 204
 23:  0 0 1 1 0 1 0 1     53  77  83 106 154 166 169 212
 24:  0 0 1 1 0 1 1 1     55 110 115 155 185 205 220 230
 25:  0 0 1 1 1 0 1 1     59 103 118 157 179 206 217 236
 26:  0 0 1 1 1 1 0 1     61  79 122 158 167 211 233 244
 27:  0 0 1 1 1 1 1 1     63 126 159 207 231 243 249 252
 28:  0 1 0 1 0 1 0 1     85 170
 29:  0 1 0 1 0 1 1 1     87  93 117 171 174 186 213 234
 30:  0 1 0 1 1 0 1 1     91 107 109 173 181 182 214 218
 31:  0 1 0 1 1 1 1 1     95 125 175 190 215 235 245 250
 32:  0 1 1 0 1 1 1 1    111 123 183 189 219 222 237 246
 33:  0 1 1 1 0 1 1 1    119 187 221 238
 34:  0 1 1 1 1 1 1 1    127 191 223 239 247 251 253 254
 35:  1 1 1 1 1 1 1 1    255


At a bit width of 13 ms, 174 out of 256 signals are passed, although not necessarily in their final forms:


(Click for larger image)

At a bit width of 23 ms, all 254 out of 256 signals are passed, except for 0 (all off) and 255 (all on), which are still inverted. Of the 174 signals passed at 13 ms, 136 of them have changed, possibly more than once:


(Click for larger image)

Plots of outputs vs. inputs for the 2 bit widths shown above are:

Some of these signals are slightly ambiguous and can be classified in more than one group. This is because the output bits are distorted in width, in part by the asymmetry of the thresholds, and the classification of signals is a "best fit" process. For example, at 13 ms, the output of signal group 7 (0 0 0 0 1 1 0 1) can be classified as either group 8 (0 0 0 0 1 1 1 1) or group 16 (0 0 0 1 1 1 1 1):

However, at 23 ms, the output of group 7 is classified as group 21 (0 0 1 0 1 1 1 1), the correct inverse signal:

Next: Signal spaces and bases.

21 December 2019

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